1. Field of the Invention
The present invention relates to a structure of an outer electrode for an electronic device such as a chip multilayer capacitor and a circuit module using the electronic device.
2. Discussion of Background
There has been proposed to use an electronic device of ceramics such as a multilayer ceramic capacitor, a chip inductor, a chip thermistor, a chip LC composite device, an array of the above-mentioned product, which is mounted on a printed circuit substrate. For example, as shown in FIG. 3, the multilayer ceramic capacitor has such a structure that outer electrodes 2 are formed at both ends of a ceramic element 1 which is formed by successively stacking dielectric materials and internal electrodes. In order to manufacture a circuit module, the outer electrodes are connected by soldering to solder lands 3a on a printed circuit substrate 3 as shown in FIG. 3. The multilayer ceramic capacitor is so operated that a voltage produced in the printed circuit substrate 3 is applied across the outer electrodes 2 through the solder lands 3a. Namely, it is of a type of so-called a voltage-operable mode wherein the operation is effected by the application of a voltage. As an example of devices belonging to this kind, there are various types of single products and arrays such as transformer parts, LC composite devices, CR composite parts and so on.
As an example of the chip inductor, there is a ferrite bead which is so constructed that outer electrodes 5 are formed at both ends of a ceramic element 4 in which an internal conductor is provided in a rectangular column-like ferrite magnetic material as shown in FIG. 4. The ferrite bead is connected by soldering to solder lands 6b formed near a power line 6a in a printed circuit substrate. The ferrite bead is of a type of, so-called, current-operable mode which is operable by supplying a current to it, namely, it is operated by a current flowing across the outer electrodes 5, through the lands 6b. As an example of devices belong to the ferrite bead, there are single products such as resistors, varistors, thermistors, inductors and so on and arrays composed of these elements.
The outer electrodes for an electronic device are usually formed as follows. As shown in FIG. 3, a paste of electric-conductive material (hereinbelow, referred to simply as a conductive paste) containing Ag or Ag--Pd or a conductive paste containing Cu is applied to both ends of a ceramic element 1 followed by baking to thereby form undercoat layers 2a as baked conductive layers; an intermediate Ni plating layer 2b is formed on each of the undercoat layers 2a, and a Sn-containing plating surface layer 2c which contains Sn or Sn--Pb is formed on each of the intermediate layers 2b. The reason why the undercoat layers are formed is because it is difficult to conduct electrolytic plating directly on the ceramic element. However, the plating should be made thin as possible since Ag is expensive and cost for plating has to be reduced. The intermediate layer is formed as a barrier layer to the Sn-containing plating layer since when the intermediate layer is formed directly on the Sn-containing plating layer, there takes place a so-called leaching phenomenon wherein Ag or Cu in the undercoat layer dissolves in the plating layer. The intermediate layer is in particular effective when the undercoat layer is Sn. The Sn-containing surface layer is to improve solderability in a case that a structural element is mounted on the printed circuit substrate.
The ceramic electronic devices having the outer electrodes are sometimes used for a long time under severe conditions of high temperature and high humidity in a state that a voltage is applied across the outer electrodes 2 as shown in FIG. 3, or in a state that there is a voltage difference between the power line 6a and the ferrite bead supplied with a current, as show in FIG. 4. In such case, there takes place a so-called ion-migration phenomenon wherein Ag or Cu contained in the undercoat layers of the outer electrodes gradually diffuses to the solder lands of the printed circuit substrate 3 or 6 through the soldered portions. This easily causes reduction in the voltage strength or short-circuiting between the opposing solder lands 3a or 6b or between one of these solder lands and an adjacent circuit wiring (not shown).